1. Field of the Invention
The present invention relates to multilayer printed wiring boards with holes requiring copper wrap plates and methods of manufacturing the same.
2. Description of the Related Art
Most electronic systems include printed wiring (or circuit) boards with high density electronic interconnections. A printed circuit board may include one or more circuit cores, substrates, or carriers. In one fabrication scheme for the printed circuit board having the one or more circuit carriers, electronic circuitries (e.g., pads, electronic interconnects, patterns, etc.) are fabricated onto opposite sides of an individual circuit carrier to form a pair of circuit layers. These circuit layer pairs of the circuit board may then be physically and electronically joined to form the printed circuit board by fabricating an adhesive (or a prepreg or a bond ply), stacking the circuit layer pairs and the adhesives in a press, curing the resulting circuit board structure, mechanically drilling (or laser drilling) through-holes, and then plating the through-holes with a copper material to interconnect the circuit layer pairs.
In some designs requiring high reliability, these printed circuit boards are formed by filling the through-holes with a conductive ink (e.g., CB100, manufactured by DuPont, Inc., or equivalent substitute from different supplier) or a non-conductive ink (e.g., PHP-900, manufactured by San-Ei Kagaku Co. Ltd., or equivalent substitute from different supplier). These ink filled holes are more reliable than non-filled holes because the cured ink plug acts as support to the hole-wall and keeps it in place. In addition, the conductive ink filled holes are more conductive to electrical signals and also dissipate more heat than non-filled holes.
However, reliability problems may still occur with these printed circuit boards having the ink filled holes. These reliability problems typically occur during the component assembly process of the printed circuit boards because this is when the printed circuit boards are exposed to a series of thermal heat excursions. It is during these thermal heat excursions that a conductor on a surface (e.g., a copper plated cap) of a plated through-hole that is filled with ink materials can separate from the electrolytic copper plated hole-wall as shown in FIGS. 1A, 1B, 2A, and 2B.
In order to help reduce this separation, IPC (Association Connecting Electronics Industries) introduced some new requirements known as “wraparound plating thickness” (IPC-6012B Amendment 1—December 2006 Qualification and Performance Specification for Rigid Printed Boards). This wraparound copper does help to reduce the occurrence of surface conductor separation from holes with barrel-plated copper as shown in FIGS. 3 and 4.
However, the wraparound plating thickness does not completely eliminate the occurrences of circuit board failures, such as surface conductor separation from holes with barrel-plated copper as shown in FIGS. 5 and 6. There is constant ongoing effort in the PCB manufacturing industry to create a balance between wrap thickness and design of the board, e.g., line width, spacing between features, number of wraps needed on any conductor layer. The main reasons for the occurrence of these circuit board failures are:                1. Inconsistent wrap thickness on the board due to inconsistent plating thickness distribution on the panel.        2. Inconsistent wrap thickness left on the board due to inconsistent planarization after the via fill process on the panel in order to remove excess via fill material from the surface of the panel.        
At the same time, the wraparound plating thickness makes it very difficult and almost impossible to manufacture some of the designs with sequential lamination cycles and/or designs with multiple blind via holes that start at a common conductor layer. Each wraparound process increases the surface plated copper by approximately 0.0005″. This increase in the surface plated copper reduces the space between traces, limiting the ability to produce fine line conductors with tight spacing on the layers with wrap plating.
Furthermore, the conductive or non-conductive ink filled holes need to be planarized (leveled) after the through-holes are filled with ink and cured. Occasionally, this planarization operation removes the wraparound copper that was previously plated. The printed circuit boards with no wraparound copper are subject to rejection as per IPC-6012B. This condition renders the printed circuit boards susceptible to have the copper plated cap separated from the hole-wall as shown FIGS. 1 and 2. Unfortunately and as mentioned above, this separation of the cap from the hole-wall may happen during the component assembly process.